Wednesday Morning, May 31
Session 2.14: | Circuits & Systems I |
Time & Place: | 11:30 - 13:30, Salamina |
Chairperson:
|
K. H. Edelmoser |
2.14.1 | |
2.14.2 | |
2.14.3 | |
2.14.4 |
12:15 |
2.14.5 | |
2.14.6 | 12:45 VHDL-based system-level design methodology for multimedia signal processing applications L. Varga, R. Kozma, A. Kun, G. Hosszu, F. Kovacs, C. Schneider Department of Electron Devices, Technical University of Budapest, Hungary |
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