Abstract:

The demand for computer system performance continues to grow to keep pace with our daily needs and to enable solutions to previously infeasible computing problems. Advances in semiconductor fabrication along with architectural and circuit innovation have helped computer system designers to accommodate this increase in performance demand since the emergence of microprocessors in the 70's. As a result, microprocessor vendors today market high-end products with roughly two billion transistors per chip offering unprecedented computational performance and capabilities. Unfortunately, while technology roadmap projections forecast the continued increase in the number of transistors per chip well into the next decade, there are fundamental sources of hardware and software bottleneck in sight that may impede the way to design and performance scalability of computer systems.

In this talk, I will present a few of these fundamental challenges and potential research directions in computer system designs to harness performance from future hundred-billion transistor chips and beyond.

Bio:

Babak Falsafi is a Professor in the School of Computer and Communication Sciences at EPFL, and an Adjunct Professor of Electrical and Computer Engineering and Computer Science at Carnegie Mellon. He is the Microarchitecture thrust leader for the FCRP Center for Circuit and System Solutions and directs the Parallel Systems Architecture Laboratory (PARSA) at EPFL. His research targets architectural support for parallel programming, resilient systems, architectures to break the memory wall, and analytic and simulation tools for computer system performance evaluation. In 1999, he showed in collaboration with T. N. Vijaykumar for the first time that multiprocessors need not support relaxed memory consistency models to achieve high performance. He is a recipient of an NSF CAREER award in 2000, IBM Faculty Partnership Awards between 2001 and 2004, and an Alfred P. Sloan Research Fellowship in 2004. He is a senior member of IEEE and ACM.