CS Other Presentations

Department of Computer Science - University of Cyprus

Besides Colloquiums, the Department of Computer Science at the University of Cyprus also holds Other Presentations (Research Seminars, PhD Defenses, Short Term Courses, Demonstrations, etc.). These presentations are given by scientists who aim to present preliminary results of their research work and/or other technical material. Other Presentations serve as a forum for educating Computer Science students and related announcements are disseminated to the Department of Computer Science (i.e., the csall list):

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Presentations Coordinator: Demetris Zeinalipour

PhD Defense: Architectural and Software Support for Data-driven Execution on Multi-core Processors, Mr. George Matheou (University of Cyprus, Cyprus), Monday, November 27, 2017, 12:00-13:00 EET.

The Department of Computer Science at the University of Cyprus cordially invites you to the PhD Defense entitled:

Architectural and Software Support for Data-driven Execution on Multi-core Processors

Abstract:
The end of the exponential growth of the sequential processors has facilitated the development of multi-core systems. Thus, any growth in performance must come from parallelism. To achieve that, efficient parallel programming/execution models must be developed. We propose to develop such systems using the Data-Driven Multithreading (DDM) model of execution. DDM is a non-blocking multithreading model that combines dynamic data-flow concurrency with efficient sequential execution on conventional processors. DDM utilizes the Thread Scheduling Unit (TSU) for scheduling threads at runtime, based on data availability. In this work, we provide architectural and software support for efficient data-driven execution on multi-core architectures, through two different DDM-based implementations. The first implementation, called MiDAS (Multi-core with Data-Driven Architectural Support), realizes the DDM model in hardware, using Field Programmable Gate Arrays (FPGAs). MiDAS is a shared-memory multi-core processor with non-coherent in-order processing elements and a hardware TSU implemented in Verilog. It has been prototyped and evaluated on a Xilinx Virtex-6 FPGA using benchmarks with different characteristics. The performance evaluation shows that MiDAS scales well and achieves very good results, even on benchmarks with very small problem sizes. The second implementation, called FREDDO (efficient Framework for Runtime Execution of Data-Driven Objects), is an efficient and portable object-oriented implementation of DDM that enables data-driven scheduling on conventional single-node and distributed multi-core systems. It also provides new features to the DDM model like recursion support and it extends the DDM’s programming interface with the object-oriented programming paradigm. FREDDO has been evaluated on two different systems: a 4-node AMD system with a total of 128 cores and a 64-node Intel HPC system with a total of 768 cores. Our evaluation analysis shows that FREDDO scales well and it achieves comparable or better performance when is compared with state-of-the-art systems, such as MPI and OmpSs@Cluster.

Short Bio:
George Matheou is a Ph.D. candidate at the Department of Computer Science of University of Cyprus, under the supervision of Prof. Paraskevas Evripidou. He holds a B.Sc. (June 2011) and M.Sc. (June 2013; first department award) in Computer Science from the University of Cyprus. He has also attended the Seventh International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES). He worked at the Department of Computer Science at the University of Cyprus as a Research Assistant for two EU FP7 projects, TERAFLUX and Long Lasting Memories. He has also worked as a Special Scientist for the XProcessor project which was funded by the University of Cyprus, and as a Teaching Assistant in classes such as Object Oriented Programming, Database Systems and C Programming. He is currently a student member of the Institute of Electrical and Electronics Engineers (IEEE) and the European Network on High Performance and Embedded Architecture and Compilation (HiPEAC), and a Special Scientist at the Department of Computer Science of University of Cyprus. During his studies he was awarded an M.Sc. and a Ph.D. scholarship from the Cyprus State Scholarship Foundation. His research interests include Parallel and Distributed Computing, Computer Architecture with emphasis on data-flow/data-driven systems, Design and Development of Runtime Systems for Data-flow execution on HPC architectures, FPGA Design and Development and Embedded Systems. He is the publicity chair of the International Workshop on Data-Flow Models for Extreme-Scale Computing (DFM) and he has published several papers in the area of Data-Driven/Data-Flow computing.

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