Limassol, Cyprus
Nov 01-04, 2018
Dates & Deadlines:
- April 8, 2018: Abstract Deadline
- April 15, 2018: Paper Deadline
- April 22, 2018: Workshop and Tutorial Proposal Deadline
- June 4-6, 2018: Author Response Period
- June 20, 2018: Author Notification
- June 29, 2018: ACM Student Research Competition
- July 9, 2018: Artifact Evaluation Submission Deadline
- Aug 3, 2018: Camera Ready Final Papers
- September 7, 2018: Student Travel Grants
- November 01-04, 2018: PACT 2018
PACT 2018 Information:
Call for Contributions
Program
Location
Registration
Conference Photos
PACT 2018 Organization:
Previous PACTs:
PACT17
PACT16
PACT15
PACT14
PACT13
PACT12
PACT11
PACT10
PACT09
PACT08
PACT07
PACT06
PACT05
PACT04
PACT03
PACT02
PACT01
PACT00
PACT99
Address questions to:
skevos [at] cs.ucy.ac.cy
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The 27th International Conference on
Parallel Architectures and Compilation Techniques (PACT18)
Limassol, Cyprus
November 01-04, 2018
PACT 2018 Main Conference
The PACT 2018 tutorials and workshops will be held
Saturday November 3 and Sunday November 4
see the Tutorials and Workshops Schedule
for details.
The PACT 2018 technical sessions will be held
Thurdsay November 1 through Saturday November 3 at the conference hotel,
the Mediterranean Hotel in Limassol, Cyprus.
PACT 2018 Main Conference Day 1 - Thursday, November 1, 2018
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08:45-09:15 |
Registration
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09:15-09:30 |
Opening
Skevos Evripidou, Michael O’Boyle, Per Stenstrom
Location: AEGEAN I |
09:30-10:30 |
Keynote
Keshav Pingali, University of Texas at Austin: "50 Years of Parallel programming: Ieri, Oggi, Domani*"
Session chair: Michael O’Boyle, University of Edinburgh
Location: AEGEAN I
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10:30-11:00 |
BREAK |
11:00-12:30 |
Session 1a: Emerging Applications & Systems
Session chair: Kemal Ebcioglu, Global Supercomputing
Location: AEGEAN I
- Massively Parallel Skyline Computation For Processing-In-Memory ArchitecturesLighting PresentationVasileios Zois (University of California, Riverside), Divya Gupta (UPMEM, SAS), Vassilis J. Tsotras, Walid A. Najjar (University of California, Riverside), Jean-Francois Roy (UPMEM, SAS)
- Data Motifs: A Lens Towards Fully Understanding Big Data and AI WorkloadsWanling Gao, Jianfeng Zhan, Lei Wang, Chunjie Luo, Daoyi Zheng, Fei Tang, Biwei Xie, Chen Zheng, Xu Wen, Xiwen He (ICT, CAS), Hainan Ye (BAFST), and Rui Ren (ICT, CAS)
- Performance Extraction and Suitability Analysis of Multi- and Many-core Architectures for Next Generation Sequencing Secondary AnalysisSanchit Misra (Intel Corporation), Tony Pan (Georgia Institute of Technology), Kanak Mahadik (Adobe Systems), George Powley, Priya N. Vaidya (Intel Corporation), Md. Vasimuddin (Indian Institute of Technology Bombay), Srinivas Aluru (Georgia Institute of Technology)
Session 1b: Memory Systems
Session chair: Vasileios Karakostas, National Technical University of Athens
Location: AEGEAN III
- Synergistic Cache Layout for Reuse and CompressionLighting PresentationBiswabandan Panda (IIT Kanpur), Andre Seznec (INRIA Rennes)
- HyPart: A Hybrid Technique for Practical Memory Bandwidth Partitioning on Commodity Servers Lighting PresentationJinsu Park, Seongbeom Park, Myeonggyun Han, Jihoon Hyun, Woongki Baek (UNIST)
- EAR: ECC-Aided Refresh Reduction through 2-D Zero CompressionJeongkyu Hong, Hyeonggyu Kim, Soontae Kim (KAIST)
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12:30-14:00 |
LUNCH
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14:00-15:30 |
Session 2a: Graph Processing
Session chair: Leonel Sousa, University of Lisbon
Location: AEGEAN I
- Log(Graph): A Near-Optimal High-Performance Graph RepresentationMaciej Besta, Dimitri Stanojevic, Tijana Zivic, Jagpreet Singh, Maurice Hörold, Torsten Hoefler (ETH Zurich)
- An Efficient Graph Accelerator with Parallel Data Conflict Management Lighting PresentationPengcheng Yao, Long Zheng, Xiaofei Liao, Hai Jin (Huazhong University of Science and Technology), Bingsheng He (National University of Singapore)
- GraphPhi: Efficient Parallel Graph Processing on Emerging Throughput-oriented Architectures Lighting Presentation
Zhen Peng, Alexander Powell (College of William and Mary), Bo Wu (Colorado School of Mines), Tekin Bicer (Argonne National Laboratory), Bin Ren (College of William and Mary)
Session 2b: Compiler Optimization
Session chair: Lawrence Rauchwerger, Texas A&M
Location: AEGEAN III
- Revealing Parallel Scans and Reductions in Recurrences through Function ReconstructionPeng Jiang (The Ohio State University), Linchuan Chen (Google), Gagan Agrawal (The Ohio State University)
- Compiler Assisted CoalescingSooraj Puthoor (AMD, University of Wisconsin-Madison), Mikko H. Lipasti (University of Wisconsin-Madison)
- VW-SLP: Auto-Vectorization with Adaptive Vector WidthLighting PresentationVasileios Porpodas (Intel), Rodrigo C. O. Rocha (University of Edinburgh), Luis F. W. Goes (PUC Minas)
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15:30-16:00 |
BREAK
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16:00-17:30 |
Session 3a: Parallelization Management
Session chair: Fernando Quintao Pereira, Fedral University, Minas Gerais
Location: AEGEAN I
- Stencil Codes on a Vector Length Agnostic ArchitectureAdrià Armejach (Barcelona Supercomputing Center / Universitat Politècnica de Catalunya), Helena Caminal (Cornell University), Juan M. Cebrián (Barcelona Supercomputing Center), Rekai González-Alberquilla (Arm), Marc Casas, Miquel Moretó (Barcelona Supercomputing Center), Chris Adeniyi-Jones (Arm), Mateo Valero (Barcelona Supercomputing Center)
- Maximizing System Utilization via Parallelism Management for Co-Located Parallel ApplicationsYounghyun Cho, Camilo Andres Celis Guzman, Bernhard Egger (Seoul National University)
- MemoDyn: Exploiting Weakly Consistent Data Structures for Dynamic Parallel MemoizationLighting PresentationPrakash Prabhu (Google), Stephen R. Beard, Sotiris Apostolakis (Princeton University), Ayal Zaks (Intel / Technion), David I. August (Princeton University)
Session 3b: Machine Learning Architectures
Session chair: Pedro Trancoso, Chalmers University of Technology
Location: AEGEAN III
- Architectural Support for Convolutional Neural Networks on Modern CPUsAnimesh Jain, Michael A. Lauernzano (University of Michigan, Ann Arbor), Gilles Pokam (Intel), Jason Mars, Lingjia Tang (University of Michigan, Ann Arbor)
- A Portable, Automatic Data Quantizer for Deep Neural NetworksYoung H. Oh (Sungkyunkwan University), Quan Quan, Daeyeon Kim, Seonghak Kim, Jun Heo (Seoul National University), Jaeyoung Jang (Sungkyunkwan University), Sung Jun Jung, Jae W. Lee (Seoul National University)
- E-PUR: An Energy-Efficient Processing Unit for Recurrent Neural Networks Lighting PresentationFranyell Silfa, Gem Dot, Jose Maria Arnau, Antonio Gonzalez (Polytechnic University of Catalonia)
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18:00-19:00 |
RECEPTION and ACM SRC Poster Session
Location: Ouzeri tis Mirtos
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PACT 2018 Main Conference Day 2 - Friday, November 2, 2018
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9:00-10:00 |
Keynote
Bettina Heim, Microsoft: "Quantum Computing - Vision and Reality"
Session chair: Michael O’Boyle, University of Edinburgh
Location: AEGEAN I
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10:00-10:30 |
BREAK
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10:30-12:30 |
Best Paper Session
Session chair: Per Stenstrom, Chalmers University of Technology
Location: AEGEAN I
- Cost Effective Speculation with the Omnipredictor Lighting PresentationArthur Perais (Qualcomm), André Seznec (Inria)
- Towards Concurrency Race Debugging: An Integrated Approach of Constraint Solving and Dynamic SlicingLong Zheng, Xiaofei Liao, Hai Jin (Huazhong University of Science and Technology), Bingsheng He(National University of Singapore), Jingling Xue (University of New South Wales), Haikun Liu (Huazhong University of Science and Technology)
- Optimizing Remote Data Transfers in X10 Lighting PresentationArun T, V Krishna Nandivada (IIT Madras)
- Near-Side Prefetch Throttling: Adaptive Prefetching for High-Performance Many-Core ProcessorsWim Heirman, Kristof Du Bois, Yves Vandriessche, Stijn Eyerman, Ibrahim Hur (Intel Corporation)
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12:30-13:30 |
LUNCH |
13:30-15:00 |
Session 4a: Runtime
Session chair: Cristina Silvano, Politecnico di Milano
Location: AEGEAN I
- Mage: Online Interference-Aware Scheduling in Multi-Scale Heterogeneous Systems Lighting PresentationFrancisco Romero (Stanford University), Christina Delimitrou (Cornell University)
- GMOD: A Dynamic GPU Memory Overflow Detector Lighting PresentationBang Di, Jianhua Sun, Hao Chen (College of Computer Science and Electronic Engineering, Hunan University), Dong Li (Department of Electrical Engineering and Computer Science, University of California, Merced)
- On-The-Fly Workload Partitioning for Integrated CPU/GPU ArchitecturesYounghyun Cho (Seoul National University), Florian Negele (ETH Zurich), Seohong Park, Bernhard Egger (Seoul National University), Thomas R. Gross (ETH Zurich)
Session 4b: Storage Systems
Session chair: André Seznec, INRIA
Location: AEGEAN III
- 3D-XPath: High-Density Managed DRAM Architecture with Cost-effective Alternative Paths for Memory TransactionsSukhan Lee (Seoul National University), Kiwon Lee (Samsung), Minchul Sung (Seoul National University), Mohammad Alian (UIUC), Chankyung Kim, Wooyeong Cho, Reum Oh, Seongil O (Samsung),Jung Ho Ahn (Seoul National University), Nam Sung Kim (Samsung)
- Attributed Consistent Hashing for Heterogeneous Storage SystemsLighting PresentationJiang Zhou, Yong Chen (Texas Tech University)
- DART: Distributed Adaptive Radix Tree for Efficient Affix-based Keyword Search on HPC Systems Lighting PresentationWei Zhang (Texas Tech University), Houjun Tang, Suren Byna (Lawrence Berkeley National Laboratory), Yong Chen (Texas Tech University)
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15:00-21:00 |
Excursion Location: Omodos village, Limassol
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PACT 2018 Main Conference Day 3 - Saturday, November 3, 2018
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9:00-10:00 |
Keynote
Natalie Enright Jerger, University of Toronto: "Architecting Chiplet-Based Systems"
Session chair: Per Stenstrom, Chalmers University of Technology
Location: AEGEAN I
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10:00-10:30 |
BREAK |
10:30-11:20 |
ACM Student Research Competition Presentations
Session chair: Pedro Trancoso, Chalmers University of Technology
Location: AEGEAN I
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11:20-13:20 |
Session 5a: Programming Models & Compilers
Session chair: Bilha Mendelson, Optitura
Location: AEGEAN I
- ComP-Net: Command Processor Networking for Efficient Intra-kernel Communications on GPUsMichael LeBeane (AMD/ UT Austin), Khaled Hamidouche, Brad Benton (AMD), Mauricio Breternitz (Instituto Universitario de Lisboa), Steven K. Reinhardt (Microsoft), Lizy K. John (UT Austin)
- Cimple: Instruction and Memory Level Parallelism DSLVladimir Kiriansky, Haoran Xu, Martin Rinard, Saman Amarasinghe (MIT CSAIL)
- Automatic Identification and Annotation of Tasks in Structured Programs Lighting PresentationPedro Ramos, Gleison Mendonça, Guilherme Leobas (UFMG), Divino César, Guido Araújo (Unicamp), Fernando Magno Quintão Pereira (UFMG)
- Cost-Driven Thread Coarsening for GPU kernels Lighting PresentationPrithayan Barua, Jun Shirako, Vivek Sarkar (Georgia Institute of Technology)
Session 5b: Memory and Acceleration
Session chair: Adrià Armejach, Barcelona Supercomputing Center
Location: AEGEAN III
- Transactional Pre-abort Handlers in Hardware Transactional MemorySunjae Park (Georgia Institute of Technology), Christopher J. Hughes (Intel), Milos Prvulovic (Georgia Institute of Technology)
- In-DRAM Near-Data Approximate Acceleration for GPUsAmir Yazdanbakhsh (Georgia Institute of Technology), Choungki Song (University of Wisconsin-Madison), Jacob Sacks (Georgia Institute of Technology), Pejman Lotfi-Kamran (Institute for Research in Fundamental Sciences (IPM)), Nam Sung Kim (University of Illinois at Urbana–Champaign), Hadi Esmaeilzadeh (University of California - San Diego)
- Biased Reference Counting: Limiting Atomic Operations in Reference CountingLighting PresentationJiho Choi, Thomas Shull, Josep Torrellas (University of Illinois at Urbana-Champaign)
- Hybrid Optimization/Heuristic Instruction Scheduling for Programmable Accelerator Codesign Lighting PresentationTony Nowatzki (UCLA), Newsha Ardalani (University of Wisconsin, Madison), Jian Weng (UCLA), Karthikeyan Sankaralingam (University of Wisconsin, Madison)
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13:20-13:30 |
Awards Presentation
Session Chair: Kemal Ebcioglu, Global Supercomputing
Location: AEGEAN I
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13:30 |
Adjourn
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